The present invention relates to a multiplexer for a digital switch, which is arranged to be included in a switch network, the data flow of which is organized into frames containing a number of time slots including data time slots, which shall be connected through the switch from first to second sets of terminal units, such as subscriber connections, trunk connections, processors, etc., wherein
the multiplexer is controlled by a processor for controllable multiplexing, i.e. mapping, of
a number of transmission links from each of a corresponding number of the terminal unit of said first set to a transmission link leading to the switch, as well as of
a transmission link leading from the switch to a number of transmission links to each of a corresponding number of terminal units of said second set, said mapping being performed on the data time slots, wherein
all data time slots arriving from the terminal units of said first set are to be sent via first buffer means to the switch in an order determined by a first mapping control memory, and
all data time slots arriving from the switch are to be sent via second buffer means toward the terminal units of said second set in an order which is determined by a second mapping control memory.
More particularly, the switch can be a time-space switch of a kind described in more detail in Swedish patent application 9103719-2. Therein it is additionally disclosed that on the transmission links there also occur, besides the data time slots, control time slots containing packet data for controlling the switch.
When several transmission links are mapped together it is important that this occurs with little delay, and that time slot integrity is retained, that is, the time slots arrive in a correct order. A certain delay is required, however, to avoid risking that data is read before having been written, since time slot integrity is then lost.
Therefore, it is important that time slot integrity can easily be checked, which is difficult if the buffers required for the mapping function are realized with usual memories.